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Elhafed BOUFOUSS

MONS

Electionseuropéennes 2024

RETROUVEZ GRATUITEMENTLe résultat des européennes à Mons ainsi que le résultat des européennes en Charente.

En résumé

- 09/2014 Senior Analog IC design engineer, PhD à nSiliton - Belgique

- 2010 – 08/2014 Doctorat en sciences de l'ingénieur à l'université catholique de Louvain – Belgique

- 2010 - 2014 Co-fondateur de la société de sous-traitance SouthicTec – Maroc

- 2009 – 2010 Ingénieur de recherche à l'université catholique de Louvain – Belgique

- 2009 – 2011 Master en sciences de gestion à la Louvain School of Management – Belgique

- 2008 – 2009 Chef de projets à la société CISSOID – Mont-St-Guibert – Belgique

- 2005 – 2008 Chef d'équipe à la société ST Microelectronics – Rabat – Maroc

- 2003 – 2005 Ingénieur en conception de circuit à ST Microelectronics – Rabat – Maroc

Entreprises

  • nSilition - Senior analog IC design

    2014 - maintenant

  • Université catholique de Louvain (UCL) - PhD

    Lyon 2009 - 2015

  • Université catholique de Louvain (UCL) - Analog IC designer

    2009 - 2009

  • CISSOID - Analog IC Design Projec Leader

    2008 - 2009 From April 2008 up to April 2009 Analog IC Design Project Leader at CISSOID -Louvain La Neuve (Belgium)


    -Project Leader of "2A driver for power MOSFET and SiC JFET"

    -Design of Low Power Bandgap and low power LDO

    -Validation of DCDC buck converter



    Working Methods

    - Weeklies to follow up projects and tasks

    - Monthly by the time logging system

    - Design and Layout Reviews after the end of every project

    - Quarterlies to review the personnel’s objectives

    CAD tools

    - CADENCE tools: Composer, Analog Artist environment, Virtuoso, Dracula, Neo Circuit, layout XL

    - MENTOR Graphics: ELDO, ELDO RF, CALIBRE, XELGA, EZWAVE

    - TANNER tools: S-EDIT, L-EDIT, HiPer Verify, Standard DRC, Standard LVS, Spice Netlist Extract

    - Eagle, LabVIEW, PSIM, Visio, Xcircuit


    Training

    - «Advanced analog implementation flow» from IDESA courses.

    - «Nanometer CMOS ICs: from Basics to ASICs» with Dr Harry Veendrick.

    -«DCDC converter » with Professor Richard REDL from ELFI S.A (Switzerland)

    - «CMOS/BICMOS Analogue IC design » with Professor Phillip E. Allen from CAEN university (France)

    - « Analog design » with Professor Issam ELMORABIT from TANGER university (Morocco)

    - Cadence and ELDO training

    - « Project Management Effectiveness Facilitation » from ST University Program

    - « Project and Time Management » from Dale Carnegie company

    - CHORUS (Managing Methods) from ST University Program

  • STMICROELECTRONICS - Team and project leader

    2003 - 2008 2006 – 2008 Analog IC Design Team Leader for High Speed Links at STMicroelectronics MMC Analog and Mixed-Signal IPs group - Rabat (Morocco)


    - Management of 5 Designers and all MIPI projects

    - Design of a High Speed Link MIPI(Mobile Industry Processor Interface) RX for Mobile implemented in the HCMOSC65 process (65nm) with 1.2V/1.8V supply

    - Design of a High Speed Link MIPI RX (Receiver) at 400MHz for Mobile implemented in the HVG8S process(0.18um) with 1.8V supply

    - Design of a High Speed Link MIPI TX (Transceiver) at 600MHz for Mobile implemented in the H9SiGe(0.13um) process with 1.8V /1.2V powers supply

    - Design of a High Speed Link MIPI TX at 500MHz for Mobile implemented in the CMOS90I (0.13um) process with only 3 metal levels and 1.2V/1.8V powers supply

    - Layout of a High Speed Link MIPI TX as an IO PAD in the H9I (0.13um) process with only 2 metal levels


    2005 – 2006 Analog Designer in ADC team at Analog and Mixed-Signal IPs group - Rabat(Morocco)

    - Design of an analog front-end to be used with a delta sigma modulator to form an audio ADC in HCMOS9(0.13um) process with 3.3V power supply:



    2003 – 2005 Analog Layouter in IO (Input Output) PAD team at Analog and Mixed-Signal IPs group - Rabat (Morocco)


    - Layout of many IOLIB (IO Library) in different technologies: M6X(0.5um), F6Y(0.35um), CMOSM8(0.18um), H9I, HCMOS9(0.13um)

    - Layout of specific IO PADs (BANDGAP, OSCILLATOR, REGULATOR…) with the respect of all constraints imposed by the layout of IOs ( ESD, latch up, guard ring isolation …)

    - Design and layout of SCHMIT TRIGGER in the HCMOS9 (0.13um) process as an IO PAD

    - Working with a remote direct manager, based in ST Rousset at France

    - Many journeys to France for discussing layout issues

  • STMICROELECTRONICS - Final year engineer work

    2003 - 2003 2003 Final year engineer work placement at STMICROELECTRONICS in Rousset (France)

    Subject: Current injection problem in the analog switch connected between the PAD and the ADC

Formations

  • Louvain School Of Managment LSM (Louvain La Neuve)

    Louvain La Neuve 2009 - 2011 Master en sciences de gestion

    Management

  • Ecole Mohammadia D'Ingénieurs (Rabat)

    Rabat 2000 - 2003 Ingénieur d'Etat

  • Ecole Mohammedia D'Ingénieurs (EMI) (Rabat)

    Rabat 2000 - 2003

Réseau

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